The MM74C925, MM74C926, MM74C927 and MM74C928CMOS counters consist of a 4-digit counter, an internal outputlatch, NPN output sourcing drivers for a 7-segment display,and an internal multiplexing circuitry with fourmultiplexing outputs. The multiplexing circuit has its ownfree-running oscillator, and requires no external clock. Thecounters advance on negative edge of clock. A HIGH signalon the Reset input will reset the counter to zero, andreset the carry-out LOW. A LOW signal on the LatchEnable input will latch the number in the counters into theinternal output latches. A HIGH signal on Display Selectinput will select the number in the counter to be displayed;a LOW level signal on the Display Select will select thenumber in the output latch to be displayed.The MM74C925 is a 4-decade counter and has LatchEnable, Clock and Reset inputs.The MM74C926 is like the MM74C925 except that it has adisplay select and a carry-out used for cascading counters.The carry-out signal goes HIGH at 6000, goes back LOWat 0000.The MM74C927 is like the MM74C926 except the secondmost significant digit divides by 6 rather than 10. Thus, ifthe clock input frequency is 10 Hz, the display would readtenths of seconds and minutes (i.e., 9:59.9).The MM74C928 is like the MM74C926 except the most significantdigit divides by 2 rather than 10 and the carry-out isan overflow indicator which is HIGH at 2000, and it goesback LOW only when the counter is reset. Thus, this is a3½-digit counter.
